30 September – 2 October 2026 | Rome, Italy
The 39th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS 2026) will take place in Rome, Italy, from 30 September to 2 October 2026.
DFTS provides an annual forum for researchers and industry experts to exchange advances in defect and fault tolerance across VLSI and nanotechnology systems. The symposium covers emerging technologies, RISC-V architectures and AI-based solutions, as well as topics spanning design, manufacturing, testing, reliability, availability and security.
A distinctive feature of DFTS is its combination of academic research with state-of-the-art industrial insights, fostering collaboration and innovation in the development of more reliable and resilient computing systems.
DARE research will be presented by Nicasio Canino, Giovanni Mazzini, Daniele Rossi and Sergio Saponara from the Department of Information Engineering, University of Pisa, with the paper:
“RERI-Compliant RAS in Multilevel EDAC-Protected Cache Memories: The ENGAGE-V”
Register here.
See you in Rome!
