General Purpose Processor (GPP)

Optimized for HPC workloads in European supercomputers

Objectives

  • High-performance, configurable and customizable OoO RISC-V IP core

    • SW/ HW co-design
  • Chiplet design and SiP integration

    • GPP chiplets for HPC apps (Codasip)
    • AIPU chiplets for Inference (Axelera)
  • Full SW stack

    • Middleware, OS porting, compiler
    • Compute libraries optimizations
    • Software Development Vehicles (SDVs)

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