Learning & Publications

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Learning

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Learn from DARE researchers and experts through a growing collection of online training sessions covering key topics, technologies, and developments explored within the project.

It's the Memory Stupid!

Training on memory systems for HPC and AI system designers and users.

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Publications

Documents, guides, and tools to support your work and learning in HPC and AI.

Towards RISC-V-based HPC: The Italian Pathfinding Activities in the DARE-SGA1 Project
Author/s: Agosta, Giovanni; Aldinucci, Marco; Bartolini, Andrea; Bellentani, Laura; Biagioni, Andrea; Cesarini, Daniele

Type of publication: Article in journal

DOI: https://doi.org/10.1109/DSD67783.2025.00057
Modular Arithmetic Based on Boolean Functions: A Divide and Conquer Approach
Author/s: Danila Gorodecky, Danila; Sousa, Leonel

Type of publication: Article in journal

DOI: https://doi.org/10.1109/ACCESS.2025.3626755
Phoebe: Measuring the Unmeasurable—Demystifying Silent Data Corruptions in AI Accelerators Through Microarchitectural Modeling
Author/s: Chatzopoulos, Odysseas; Trakosa, Maria; Dixit, Harish D.; Sankar, Sriram; Gizopoulos, Dimitris

Type of publication: Article in journal

DOI: 10.1109/MM.2025.3646859
Harpocrates++: Automated Functional Program Generation Against CPU Faults and Silent Data Corruptions
Author/s: Karystinos, Nikos; Fragkoulis, George-Marios; Chatzopoulos, Odysseas; Gizopoulos, Dimitris; Gurumurthi, Sudhanva

Type of publication: Article in journal

DOI: 10.1109/MM.2025.3640385
vACE: Exploring the Design Space of Vector Processing Units for Soft Error Vulnerability
Author/s: Fragkoulis, George-Marios; Gizopoulos, Dimitris

Type of publication: Conference proceeding

DOI: 10.1109/IISWC66894.2025.00023
Sisyphus: Cross-Layer Efficiency Across NVM Technologies in Compute-in-Memory Architectures
Author/s: NEZHADI, ALI; Chatzopoulos, Odysseas; Mayahinia, Mahta; Papadimitriou, George; Tahoori, Mehdi; Gizopoulos, Dimitris

Type of publication: Conference proceeding

DOI: 10.1109/ITC58126.2025.00028
Accurate Analysis of Silent Data Corruptions in Programmable AI Accelerator Microarchitectures
Author/s: Chatzopoulos, Odysseas ; Trakosa, Maria ; Gizopoulos, Dimitris

Type of publication: Conference proceeding

DOI: 10.1109/IOLTS65288.2025.11117031
Evaluating ECC for Cache Reliability Under Multi-Bit Upsets: A Design Space Exploration
Author/s: Kotsimpou, Foteini ; Gizopoulos, Dimitris

Type of publication: Conference proceeding

DOI: 10.5281/zenodo.17193407
Report on Maturity of LLVM’s Fortran Support
Author/s: Toda, Ferran; Ferrer, Roger

Type of publication: Report

DOI: 10.5281/zenodo.16960275

DARE Zenodo community

The DARE Zenodo community serves as an open repository for public deliverables and additional open-access publications.

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Learning & Publications

Learning

It's the Memory Stupid!

DARE YouTube Channel

Publications

Documents, guides, and tools to support your work and learning in HPC and AI.

Towards RISC-V-based HPC: The Italian Pathfinding Activities in the DARE-SGA1 Project

Modular Arithmetic Based on Boolean Functions: A Divide and Conquer Approach

Phoebe: Measuring the Unmeasurable—Demystifying Silent Data Corruptions in AI Accelerators Through Microarchitectural Modeling

Harpocrates++: Automated Functional Program Generation Against CPU Faults and Silent Data Corruptions

vACE: Exploring the Design Space of Vector Processing Units for Soft Error Vulnerability

Sisyphus: Cross-Layer Efficiency Across NVM Technologies in Compute-in-Memory Architectures

Accurate Analysis of Silent Data Corruptions in Programmable AI Accelerator Microarchitectures

Evaluating ECC for Cache Reliability Under Multi-Bit Upsets: A Design Space Exploration

Report on Maturity of LLVM’s Fortran Support

DARE Zenodo community

The DARE Zenodo community serves as an open repository for public deliverables and additional open-access publications.

Partner area

Access the partner area to find internal tools and resources