Accurate Analysis of Silent Data Corruptions in Programmable AI Accelerator Microarchitectures2025-11-05T11:38:12+00:00
Evaluating ECC for Cache Reliability Under Multi-Bit Upsets: A Design Space Exploration2025-11-05T11:34:35+00:00
Report on Maturity of LLVM’s Fortran Support2025-11-05T08:35:33+00:00
Resources2025-11-04T14:20:15+00:00
Software2025-07-17T13:16:41+00:00
General Purpose Processor (GPP)2025-07-21T09:43:49+00:00
AI Processing Unit (AIPU)2025-10-23T19:11:21+00:00
Vector Accelerator​ (VEC)2025-07-21T09:45:37+00:00
The DARE SGA1 project has received funding from the European High-Performance Computing Joint Undertaking (JU) under grant agreement No 101202459. The JU receives support from the European Union’s Horizon Europe research and innovation programme and Spain, Germany, Czechia, Italy, Netherlands, Belgium, Finland, Greece, Croatia, Portugal, Poland, Sweden, France and Austria. Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or of the granting authority. Neither the European Union nor the granting authority can be held responsible for them.

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