HARDWARE – AIPU
Artificial Intelligence Processing Unit (AIPU)
A high-performance, energy-efficient and scalable AI inference chiplet for AI-accelerated HPC.
At a glance
AI inference chiplet
High performance and high energy efficiency, designed to scale.
Digital in-memory computing
Weight storage and compute units interleaved in a dense layout.
Full-precision accumulation
Accumulation in full precision, with minimal loss of neural-network accuracy.
Scales with CMOS
Technology commensurate with CMOS scaling to low lithography nodes.
RISC-V software stack
Complete compiler and software stack based on RISC-V.
What we are building
The AI Processing Unit (AIPU) is DARE’s AI inference chiplet, led by Axelera AI. It is designed for high performance, high energy efficiency and scalability, and builds on Axelera AI’s digital in-memory computing (D-IMC) technology.
Together with the General Purpose Processor (GPP), the AIPU forms a complete System-in-Package: AIPU chiplets handle AI inference, GPP chiplets run classical HPC workloads. A complete compiler and software stack is developed on the RISC-V architecture and Axelera AI’s infrastructure.


