HARDWARE – GPP
General Purpose Processor (GPP)
A high-performance, configurable out-of-order RISC-V core and chiplet, optimised for HPC workloads in European supercomputers.
At a glance
Out-of-order
RISC-V core
High-performance, configurable and customisable IP core.
Hardware/software co-design
Developed together with the software and applications that will run on it.
Chiplet and System-in-Package
GPP chiplets are integrated with AIPU chiplets in one package.
Full software stack
Middleware, OS porting, compiler and optimised compute libraries.
Software Development Vehicles
Software work starts before the chip exists.
What we are building
The General Purpose Processor (GPP) is one of the three RISC-V chiplets developed in DARE. Led by Codasip, it is a high-performance, configurable and customisable out-of-order RISC-V core designed for classical HPC workloads in European supercomputers.
The GPP is built as a chiplet. Together with the AI Processing Unit (AIPU), it forms a complete System-in-Package (SiP): GPP chiplets run classical HPC workloads, while AIPU chiplets accelerate AI inference. The SiP is mounted on a PCIe card for integration into HPC systems.
A full software stack is developed in parallel with the hardware, including middleware, operating-system porting, compilers and optimised compute libraries. Software Development Vehicles (SDVs) let developers port and test their code from day one.
Image shown is illustrative.
