February 6, 2026
The DARE project contributed to key discussions at HiPEAC 2026, held from 26–28 January 2026 in Kraków. As part of the Barcelona Supercomputing Center (BSC) presence with a RISC-V@BSC booth, DARE was showcased alongside major RISC-V initiatives developed at BSC, including EUPILOT and the European Processor Initiative.
RISC-V@BSC booth
A key highlight was the workshop “RISC-V: the cornerstone ISA for the next generation of HPC infrastructures”, moderated by Teresa Cervero García (BSC). The session gathered experts from academia and industry to discuss the current state and future potential of RISC-V as a strategic instruction set architecture for high-performance computing. DARE was presented by Negin Mahani (BSC), among leading European projects driving digital autonomy through open hardware, with contributions from Alexandra Kourfali, Carlos Puchol, and Etienne Walter.
Left to right: Negin Mahani (BSC, Abraham Ruiz (BSC), Etienne Walter (Eviden), Carlos Puchol (BSC), Teresa Cervero (BSC)
In addition, the event programme included the session “Building the Diversity Continuum in Cutting-Edge Technologies”, organised by the MAR Chapter of Women in HPC and led by Sara Royuela (BSC), highlighting the importance of diversity and inclusion in advancing the HPC landscape.
Throughout the conference, DARE representatives engaged with the broader HPC community, sharing the project’s vision and latest progress towards strengthening Europe’s technological sovereignty through RISC-V.
Discover more about HiPEAC here.
